A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Accelerator

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A Configurable and Efficient Memory Hierarchy for Neural Network Hardware Accelerator

Author: Bause, Oliver; Bernardo, Paul Palomero; Bringmann, Oliver
Tübinger Autor(en):
Bringmann, Oliver
Issue year: 2024-04-24
Verlagsangabe: arXiv
Language: English
Full text: https://doi.org/10.48550/arXiv.2404.15823
DDC Classifikation: 004 - Data processing and computer science
Dokumentart: Preprint
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